1. Field of the Invention
The present invention relates to a liquid crystal display, and more particularly to a liquid crystal display device and a fabricating method thereof for lowering power consumption as well as integrating a driver on a substrate.
2. Discussion of the Related Art
Generally, a liquid crystal display (LCD) controls light transmittance of liquid crystal using an electric field to display a picture. The liquid crystal display may be largely classified as a vertical electric field type and a horizontal electric field type based upon a driving direction of the electric field for the liquid crystal.
The liquid crystal display of a vertical electric field applying type drives a liquid crystal in a twisted nematic (TN) mode using a vertical electric field formed between a pixel electrode and a common electrode arranged in opposition to each other on the upper and lower substrate. The liquid crystal display of the vertical electric field applying type has an advantage of a large aperture ratio while having a drawback of a narrow viewing angle of about 90°.
The liquid crystal display of a horizontal electric field applying type drives a liquid crystal in an in plane switching (IPS) mode using a horizontal electric field between the pixel electrode and the common electrode arranged parallel to each other on the lower substrate. The liquid crystal display of the horizontal electric field applying type has an advantage of a wide viewing angle of about 160°.
Hereinafter, the liquid crystal display of horizontal electric field applying type will be described in detail.
FIG. 1 is a block diagram showing a configuration of a related art liquid crystal display of a horizontal electric field applying type.
In FIG. 1, the related art liquid crystal display of the horizontal electric field applying type includes, a liquid crystal display panel 10, a data driver 2 for driving data lines DL of the liquid crystal display panel 10, a gate driver 4 for driving gate lines GL of the liquid crystal display panel 10, a timing controller 6 for controlling the gate driver 4 and the data driver 2, and a common voltage generator 8 for supplying a reference voltage signal to common lines CL of the liquid crystal display panel 10.
The timing controller 6 supplies pixel data signals R, G and B Data input from the exterior thereof to the data driver 2. Further, the timing controller 6 generates gate control signals GDC and data control signals DDC for driving the gate driver 4 and the data driver 2, respectively, in response to control signals H, V, DE and CLK input from the exterior thereof.
The gate control signals GDC include, for example, a gate start pulse GSP, a gate shift clock GSC and a gate output enable signal GOE, etc. The data control signals DDC include, for example, a source start pulse SSP, source shift clock signal SSC, a source output enable signal SOE and a polarity control signal POL, etc.
The gate driver 4 sequentially applies scanning pulses to the gate lines GL1 to GLn in response to gate control signals GDC from the timing controller 6. Thus, the gate driver 4 allows thin film transistors TFT connected to the gate line GL1 to GLn to be driven for each gate line GL.
The data driver 2 applies pixel voltage signals for each horizontal line to the data lines DL1 to DLm every horizontal period H1, H2, . . . in response to the data control signals DDC from the timing controller 6. Particularly, the data driver 2 converts digital pixel data R, G and B from the timing controller 6 to analog voltage signals using gamma voltages from a gamma voltage generator (not shown).
The common voltage generator 8 generates a common voltage Vcom and applies the common voltage Vcom, via a common line CL, to a common electrode for making a horizontal electric field along with the pixel electrode.
The liquid crystal display panel 10 includes thin film transistors TFT provided at each crossing between n gate lines GL1 to GLn and m data lines DL1 to DLm, and liquid crystal cells Clc connected to the thin film transistors TFT and arranged in a matrix type.
The thin film transistor TFT applies data from the data lines DL1 to DLm to the liquid crystal cell Clc from a gate signal from the gate lines GL1 to GLn. Since the liquid crystal cell consists of a pixel electrode 12 connected to the thin film transistor TFT, and a common electrode 14 provided parallel to the pixel electrode 12 to make a horizontal electric field and connected to the common line CL as shown in FIG. 2, it can be equivalently expressed as a liquid crystal capacitor Clc. Such a liquid crystal cell includes a storage capacitor Cst consisting of the common line CL and the pixel electrode 12 overlapping with each other with having at least one layer of insulating film so as to keep a pixel voltage signal charged in the liquid crystal capacitor Clc until the next pixel voltage signal is charged therein.
In such an LCD, driving systems such as line inversion, column inversion and dot inversion are used to drive the liquid crystal cells on the liquid crystal display panel.
As shown in FIG. 3A and FIG. 3B, the dot inversion driving system allows pixel voltage signals having polarities opposite to other liquid crystal cells being adjacent to each other in the horizontal and vertical directions to be applied to the liquid crystal cells, and allows the polarities of the pixel voltage signals to be inverted for each frame. The dot inversion driving system cancels cross talk generated between the liquid crystal cells that are adjacent in the vertical and horizontal directions with respect to each other, thereby providing a better picture quality than other inversion systems.
In the liquid crystal cells shown in FIG. 1 and FIG. 2 driven by such a dot inversion driving system, positive(+) and negative(−) pixel voltage signals Vd are alternately applied in an alternating current type for each vertical period 1V, while a common voltage signal Vcom supplied to the common line CL is applied in a direct current type as shown in FIG. 4. Thus, the pixel voltage signal Vd applied to the pixel electrode 12 and the common voltage signal Vcom applied to the common electrode 14 have a desired voltage difference ΔV having a relatively low level from each other. Accordingly, in order to change an alignment of the liquid crystal to a desired angle, there is required a pixel voltage signal Vd having a relatively high level on a basis of the common voltage signal Vcom. Such a requirement raises a problem in that the data driver for generating the pixel voltage signal Vd has a relatively high cost.
Furthermore, a horizontal electric field formed by the voltage difference between the pixel voltage signal Vd and the common voltage signal Vcom is more increased as a distance between the pixel electrode 12 and the common electrode 14 goes closer than as a distance between the two electrodes 12 and 14 goes farther. Thus, it becomes possible to obtain a desired horizontal electric field even though the pixel voltage signal Vd supplied to the pixel electrode 12 when the pixel electrode 12 and the common electrode 14 are close to each other is lower than the pixel voltage signal Vd supplied to the pixel electrode 12 when they are far from each other. However, there is raised a problem in that, as a distance between the two electrodes 12 and 14 gets closer, an area transmitted by a light is narrowed, thereby lowering an aperture ratio. On the other hand, there is raised a problem in that, if a distance between the two electrodes 12 and 14 goes far in order to enhance an aperture ratio, then an output value of the pixel voltage signal Vd supplied to the pixel electrode 12 becomes high, thereby increasing a cost of the data driver 2.
In the related art LCD, the gate driver 4 and the data driver 2 are separated into a plurality of integrated circuits (IC's) to be manufactured into a chip shape. Each of the drive IC's is mounted onto an IC area opened on a tape carrier package (TCP) or mounted onto a base film of the TCP by a chip on film (COF) system, and is electrically connected to the liquid crystal display panel 10 by a tape automated bonding (TAB) system.
The drive IC's mounted onto the liquid crystal display panel 10 by the TCP are connected, via a flexible printed circuit (FPC) and a sub printed circuit board (PCB), to a timing controller and a power source of a main PCB. More specifically, the data drive IC's receive data control signals and pixel data from the timing controller mounted, via the FPC and the data PCB, onto the main PCB; and power signals from the power source. The gate drive IC's receive gate control signals from the timing controller mounted, via the gate FPC and the gate PCB, onto the main PCB; and power signals from the power source.
As mentioned above, each of the gate driver 4 and the data driver 2 requires individual drive IC, TCP, PCB and FPC, etc. The related art LCD has a problem in that it is difficult to have a thin design due to a weight occupied by the individual elements.